DS200TCQAG1A is an Analog I/O Board developed by GE. The Analog IO Board (TCQA) scales and conditions many of the analog signals read in by terminal boards mounted on the I/O cores R1, R2, and R3. These signals include LVDT inputs, servo valve outputs, thermocouple inputs, 420 mA inputs and outputs, vibration inputs, relay driver outputs, pulse inputs, voltage inputs, and generator and line signals. Some of the signals are written to the STCA board via the 3PL connector. The JE connector is used to exchange the generator and line signals with the TCQC board.
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Product ID:DS200SDCCG1AGD
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Detail→DS200SDCCG1AGD
DS200TCQAG1A Connectors
2PL - Distributes TCPS board power to the R1, R2, and R3 cores.
3PL - The Data Bus that connects the STCA and TCQA boards in cores R2 and R3, as well as the STCA, TCQA, and TCQE boards in core R1. Conditioned signals are transferred to the COREBUS via 3PL.
JA - Transports thermocouple inputs and cold junction compensation from the TBQA board connector JAR/S/T for cores R1, R2, and R3.
JB - Transports the 4-20 mA inputs and outputs to and from the JBR terminal board connector on the TBQC.
JD - Transports trip signals from the R1 core to the TCTG board in the P1 core; not used in R2 or R3.
JE - Sends and receives servo valve driver outputs, relay driver outputs, generator and line signals, and pulse signals to and from the TCQC board. The power supply monitor inputs are carried.
JF - The LVDT/LVDR position inputs from the TBQC terminal board connector JFR are carried by JF.
JG - The vibration inputs from the TBQB terminal board connector JG, as well as the +/- 10 V dc inputs, are carried by JG.
LVDT/R Circuit
To detect the position of actuators, linear variable differential transformers (LVDT) or linear variable differential reactors (LVDR) are used. The JF connector is used to read position signals from the TBQC terminal board. The Control Sequence Program employs the scaled and conditioned signals (CSP).
The LVDT/R excitation signals are written to the QTBA terminal board via the TCQC board. LVDT/Rs are commonly used to regulate servo valve outputs.
Seismic Vibration Circuit
The seismic vibration sensors in R2 and R3 are terminated on the TBQB terminal board and read by the TCQA board of the R1 and R3 cores, respectively. The signals are scaled and conditioned before being written to the Control Engine for monitoring and protection by the CSP. Scaling values are set in the operator interface's I/O Configurator.
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